"The QMR architecture is realized with a redundant Controller. This redundant architecture contains two QPPs (see Figure above), which results in quadruple redundancy.The 2oo4D voting is realized by combining 1oo2 voting of both CPUs and memory in each QPP, and 1oo2D voting between the two QPPs. Voting takes place on two levels i.e.; on a module level and between the QPPs." This is from Honeywell manual can any one explain me above architecture and how 2oo4 voting is achieved in this.